1. Field of the Invention
The present invention relates to a regulator circuit which steps down a given power supply voltage and supplies a resultant decreased voltage to a circuit. More particularly, the present invention is concerned with a regulator circuit which is integrated, on a chip, with a circuit to be supplied with the voltage output by the regulator circuit.
2. Description of the Related Art
FIG. 1 is a diagram of a conventional semiconductor integrated circuit in which a regulator circuit 2 and internal circuits 3 are integrally formed on a chip 1. An external power supply voltage Vcc1 is supplied to the regulator circuit 2 formed on the chip 1. The regulator circuit 2 steps down the external power supply voltage and produces a given internal power supply voltage Vcc2, which is supplied to the internal circuits 3.
The regulator circuit 2 is required in a situation in which the internal circuits 3 are formed of fine elements such as MOS transistors while a system to which the chip 1 is connected employs the power supply voltage Vcc1 higher than the Vcc2. For example, the external power supply voltage Vcc1 is equal to 5 V, and the internal power supply voltage Vcc2 is equal to 3.3 V.
FIG. 2 is a block diagram of the regulator circuit 2, which is made up of a reference voltage generating circuit 4, an output voltage control circuit 5 and an output circuit 6. The output voltage control circuit 5 compares a reference voltage Vref generated by the reference voltage generating circuit 4 with a fed-back voltage Vf from the output circuit 6, and outputs a resultant control signal Vc to the output circuit 6. Hence, the output circuit 6 is caused to maintain the internal power supply voltage Vcc2 at a constant level. It should be noted that all of the circuits 4, 5 and 6 are driven by the external power supply voltage Vcc1.
The regulator circuit 2 has the following disadvantages. As described above, the external power supply voltage Vcc1 is higher than the internal power supply voltage Vcc2 applied to the internal circuits 3. Hence, it is required that the elements forming the circuits 4 through 6, such as MOS transistors, have a size greater than that of the elements forming the internal circuits 3. More particularly, it is required that the MOS transistors used for the circuits 4 through 6 have an increased breakdown voltage. For this requirement, the MOS transistors are designed to have an increased gate length and increased source/drain regions. Thus, the regulator circuit made up of the circuits 4 through 6 occupies a large area on the chip 1, and the integration density of the chip 1 is reduced. If an available area on the chip 1 is not sufficiently obtained, it will be necessary to increase the size of the chip 1.
There is a case where the internal circuits 3 have a function which requires a certain reference voltage. In such a case, the reference voltage Vref generated by the reference voltage generating circuit 4 of the regular circuit 2 can be used as the reference voltage of the internal circuits 3. Hence, the reference voltage generating circuit 4 can be commonly owned by the regulator circuit 2 and the internal circuits 3.
However, the reference voltage Vref generated by the reference voltage generating circuit 4 may transiently reach the external power supply voltage Vcc1 because the reference voltage generating circuit 4 is driven by the external power supply voltage Vcc1. In this case, if the external power supply voltage Vcc1 is applied to the internal circuits 3 as the reference voltage Vref, the internal circuits 3 may be destroyed. Hence, in practice, it is necessary to provide, separately from the reference voltage generating circuit 4, another reference voltage generating circuit specifically applied to the internal circuits 3. However, the additional reference voltage generating circuit reduces the available area on the chip 1.